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19-1268; Rev 0; 8/97
KIT ATION EVALU ABLE AVAIL
Low-Voltage, Precision Step-Down Controller for Portable CPU Power
____________________________Features
o 1% DC Accuracy (Adjustable Mode) o Output Overvoltage Crowbar Protection o Output Undervoltage Shutdown o Adjustable Switching Frequency to 340kHz o Low-Dropout Operation o Idle Mode Pulse-Skipping Operation o 1.10V to 5.5V Adjustable Output Voltage o 2.5V/3.3V Dual-Mode Fixed-Output Settings o Internal Digital Soft-Start o 1.1V 1% Reference Output o 3A (typ) Shutdown Current R o Open-Drain Power-Good Output (RESET) o 20-Pin SSOP Package
_______________General Description
The MAX1636 is a synchronous, buck, switch-mode, power-supply controller that generates the CPU supply voltage in battery-powered systems. It achieves 1% output voltage accuracy and offers the excellent loadtransient response needed by upcoming generations of dynamic-clock CPUs. Up to 95% efficiency is achieved through synchronous rectification and Maxim's proprietary Idle ModeTM control scheme. Efficiency is greater than 80% over a 1000:1 load-current range, extending battery life in system-suspend or standby modes. Excellent dynamic response corrects output load transients caused by the latest dynamic-clock CPUs within five 300kHz clock cycles. Strong, 1A, on-board gate drivers ensure fast, external N-channel MOSFET switching. The MAX1636 features a logic-controlled and synchronizable, fixed-frequency, pulse-width-modulation (PWM) operating mode that reduces noise and RF interference in sensitive mobile communications and pen-entry applications. Holding SKIP high forces fixed-frequency mode for lowest noise under all load conditions. For a low-cost version that omits the +5V VL linearregulator block and comes in a smaller 16-pin QSOP package, refer to the MAX1637 data sheet.
MAX1636
______________Ordering Information
PART MAX1636EAP TEMP. RANGE -40C to +85C PIN-PACKAGE 20 SSOP
________________________Applications
Notebook Computers Subnotebook Computers Desktop Computers Bus-Termination Supplies
V+ SHDN
__________Typical Operating Circuit
VIN
__________________Pin Configuration
TOP VIEW
CSH 1 CSL 2 RESET 3 SHDN 4 OVP 5 CC 6 REF 7 SYNC 8 GND 9 GND 10 20 SKIP 19 LX 18 DH 17 BST
OVP VL VCC
CC
DH BST LX
MAX1636
SKIP SYNC
MAX1636
16 PGND 15 DL 14 VL 13 V+ 12 VCC 11 FB
DL
PGND CSH
GND
CSL FB RESET TO P
REF GND
SSOP
Idle Mode is a trademark of Maxim Integrated Products.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 For small orders, phone 408-737-7600 ext. 3468.
Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
ABSOLUTE MAXIMUM RATINGS
V+ to GND ...............................................................-0.3V to 36V GND to PGND........................................................................2V SHDN to GND. ......................................................... -0.3V to 36V LX, BST to GND. ...................................................... -0.3V to 36V DH, BST to LX .............................................................-0.3V to 6V VL, VCC, CSL, CSH, FB, SKIP to GND ...................... -0.3V to 6V DL to GND.. ..................................................-0.3V to (VL + 0.3V) REF, RESET, SYNC, CC, OVP to GND. ..... -0.3V to (VCC + 0.3V) VL Output Current... ............................................................50mA VL Short Circuit to GND..............................................Momentary REF Output Current ............................................................20mA REF Short Circuit to GND ....... ......................................Indefinite Continuous Power Dissipation (TA = +70C) SSOP (derate 8.00mW/C above +70C) .....................640mW Operating Temperature Range MAX1636EAP. ..................................................-40C to +85C Storage Temperature Range .............................-65C to +160C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V+ = 15V, SYNC = VL = VCC, IVL = 0mA, IREF = 0mA, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SMPS CONTROLLER Input Voltage Range, V+ Input Voltage Range, VL Input Voltage Range, VCC Output Voltage, Adj Mode Output Voltage, Fixed 2.5V Mode Output Voltage, Fixed 3.3V Mode Output Adjustment Range Current-Limit Threshold Power Consumption Shutdown Supply Current (V+) FB Input Current Soft-Start Ramp Time Idle Mode Switchover Threshold Input source for VL regulator Gate-driver supply rail Internal chip supply rail FB tied to VOUT, 0mV < (CSH - CSL) < 80mV, 4.5V < V+ < 30V (includes line and load regulation) FB tied to VCC, 0mV < (CSH - CSL) < 80mV, 4.5V < V+ < 30V (includes line and load regulation) FB tied to GND, 0mV < (CSH - CSL) < 80mV, 4.5V < V+ < 30V (includes line and load regulation) VCC = VL = 5V VCC = 3.3V, VL = 5V Positive direction Negative direction VCC = 5V, output not switching VCC = 3.3V, output not switching SHDN = GND, OVP = GND FB forced to REF SHDN to full current limit, five levels CSH - CSL 20 -50 512 30 40 3 4.5 4.2 3.15 1.090 2.486 3.282 VREF VREF 80 -145 100 -100 1.100 2.55 3.366 30 5.5 5.5 1.110 2.614 3.450 5.5 3.6 120 -55 2.0 1.5 10 50 V V V V V V V mV mV mW A nA clks mV CONDITIONS MIN TYP MAX UNITS
2
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = 15V, SYNC = VL = VCC, IVL = 0mA, IREF = 0mA, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER INTERNAL VL REGULATOR AND REFERENCE VCC = 5V, I(VL) = 0 Regulator Supply Current (V+) Standby Supply Current (V+) VL Output Voltage VL Undervoltage Lockout Threshold VL/ VCC Switchover Threshold REF Output Voltage REF Load Regulation REF Line Regulation OSCILLATOR Oscillator Frequency Maximum Duty Factor Maximum Duty Factor, Dropout Mode SYNC Input Pulse Width High SYNC Input Pulse Width Low SYNC Input Rise/Fall Time SYNC Input Frequency Range OVERVOLTAGE PROTECTION Overvoltage Trip Threshold Overvoltage Fault Propagation Delay Thermal Shutdown Threshold Catastrophic Output Undervoltage Lockout Threshold Catastrophic Output Undervoltage Lockout Delay RESET Trip Threshold RESET Delay Time INPUTS AND OUTPUTS Logic Input Voltage High Logic Input Voltage Low Logic Input Bias Current SHDN Input Bias Current RESET Output Voltage Low RESET Output Leakage Current SHDN, SKIP, OVP, SYNC SHDN, SKIP, OVP, SYNC Pin at GND or VCC; SKIP, OVP, SYNC SHDN = GND or V+ ISINK = 4mA +5.5V stress voltage applied -1 -3 2.4 0.8 1 3 0.4 V V A A V A FB, with respect to regulation point FB to DL delay, 22mV overdrive, CGATE = 2000pF Hysteresis = 10C % of nominal output From shutdown or power-on-reset state Falling edge (hysteresis = 1%) -6 32768 60 4 7 1.25 150 70 6144 -3 80 10 % s C % clks % clks Guaranteed by design 240 SYNC = VCC SYNC = GND SYNC = VCC SYNC = GND SYNC = GND 270 170 91 93 98 200 200 200 340 300 200 94 96 99 330 230 kHz % % ns ns ns kHz VCC = 5V, I(VL) = 0, V+ = 4.5V (includes PNP base current) SHDN = GND, OVP = VCC I(VL) = 0 to 25mA, 5V < V+ < 30V I(VL) = 0 to 25mA, 6V < V+ < 30V Rising edge, hysteresis = 25mV Rising edge, hysteresis = 25mV No REF load REF load = 0 to 50A VCC = 3.3V to 5.5V 1.090 4.5 4.7 3.45 5.0 5.0 3.60 3.15 1.100 1.110 10 3 60 500 60 5.3 5.3 3.75 A A V V V V mV mV CONDITIONS MIN TYP MAX UNITS
MAX1636
1
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3
Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = 15V, SYNC = VL = VCC, IVL = 0mA, IREF = 0mA, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Current-Sense Input Leakage Current Gate-Driver Sink/Source Current Gate-Driver On-Resistance CONDITIONS CSH = CSL = 5V, V+ = VL = VCC = GND, either CSH or CSL input DH or DL forced to 2V High or low, DH or DL 1 7 MIN TYP MAX 10 UNITS A A
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V+ = 15V, SYNC = VL = VCC, IVL = 0mA, IREF = 0mA, TA =-40C to +85C, unless otherwise noted.) (Note 1) PARAMETER SMPS CONTROLLER Input Voltage Range, V+ Input Voltage Range, VL Input Voltage Range, VCC Output Voltage, Adj Mode Output Voltage, Fixed 2.5V Mode Output Voltage, Fixed 3.3V Mode Output Adjustment Range Current-Limit Threshold Power Consumption Input source for VL regulator Gate-driver supply rail Internal chip supply rail FB tied to VOUT, 0mV < (CSH - CSL) < 80mV, 4.5V < V+ < 30V (includes line and load regulation) FB tied to VCC, 0mV < (CSH - CSL) < 80mV, 4.5V < V+ < 30V (includes line and load regulation) FB tied to GND, 0mV < (CSH - CSL) < 80mV, 4.5V < V+ < 30V (includes line and load regulation) VCC = VL = 5V VCC = 3.3V, VL = 5V Positive direction VCC = 5V, output not switching VCC = 3.3V, output not switching VCC = 5V, I(VL) = 0 Regulator Supply Current (V+) Standby Supply Current (V+) VL Output Voltage VL Undervoltage Lockout Threshold VCC = 5V, I(VL) = 0, V+ = 4.5V (includes PNP base current) SHDN = GND, OVP = VCC I(VL) = 0 to 25mA, 5V < V+ < 30V I(VL) = 0 to 25mA, 6V < V+ < 30V Rising edge, hysteresis = 25mV 4.5 4.7 3.45 4.5 4.2 3.15 1.086 2.432 3.195 VREF VREF 70 30 5.5 5.5 1.114 2.635 3.497 5.5 3.6 130 2.0 1.5 60 500 60 5.3 5.3 3.91 A A V V V V V V V V V mV mW CONDITIONS MIN TYP MAX UNITS
INTERNAL VL REGULATOR AND REFERENCE
4
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = 15V, SYNC = VL = VCC, IVL = 0mA, IREF = 0mA, TA = -40C to +85C, unless otherwise noted.) (Note 1) PARAMETER OSCILLATOR Oscillator Frequency SYNC Input Pulse Width High SYNC Input Pulse Width Low SYNC Input Rise/Fall Time SYNC Input Frequency Range OVERVOLTAGE PROTECTION Overvoltage Trip Threshold Catastrophic Output Undervoltage Lockout Threshold RESET Trip Threshold INPUTS AND OUTPUTS Logic Input Voltage High Logic Input Voltage Low RESET Output Voltage Low Gate-Driver On-Resistance SHDN, SKIP, OVP, SYNC SHDN, SKIP, OVP, SYNC ISINK = 4mA High or low, DH or DL 2.4 0.8 0.4 7 V V V FB, with respect to regulation point % of nominal output Falling edge (hysteresis = 1%) 3.5 60 -7 10 80 -1.5 % % % Guaranteed by design 240 SYNC = VCC SYNC = GND 270 170 200 200 200 340 330 230 kHz ns ns ns kHz CONDITIONS MIN TYP MAX UNITS
MAX1636
Note 1: Specifications to -40C are guaranteed by design and not production tested.
__________________________________________Typical Operating Characteristics
(Circuit of Figure 1, VIN = 7V, TA = +25C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT (3.3V/3A CIRCUIT)
MAX1636 TOC01
EFFICIENCY vs. LOAD CURRENT (5V/3A CIRCUIT)
MAX1636 TOC02
EFFICIENCY vs. LOAD CURRENT (1.8V/1A CIRCUIT)
MAX1636 TOC03
100 VIN = 7V 90 EFFICIENCY (%) VIN = 15V
100 VIN = 7V 90 EFFICIENCY (%) VIN = 15V
100
90 EFFICIENCY (%)
VIN = 7V
80 VIN = 22V VIN = 30V
80 VIN = 22V 70 VIN = 30V
80 VIN = 15V 70 VIN = 22V
70
60
60
60
50 1m 10m 100m LOAD CURRENT (A) 1 10
50 1m 10m 100m LOAD CURRENT (A) 1 10
50 1m 10m 100m LOAD CURRENT (A) 1 10
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
_____________________________Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 7V, TA = +25C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT (1.8V/4A CIRCUIT)
MAX1636 TOC04
EFFICIENCY vs. LOAD CURRENT (1.8V/7A CIRCUIT)
MAX1636 TOC05
QUIESCENT SUPPLY CURRENT vs. INPUT VOLTAGE
MAX1636 TOC06
100
100
1000 QUIESCENT SUPPLY CURRENT (mA)
90 EFFICIENCY (%)
VIN = 7V
90 EFFICIENCY (%) VIN = 7V 80 VIN = 15V
100
80 VIN = 15V 70 VIN = 22V
10
70
1
60
60 VIN = 22V
0.10 VOUT = 3.3V 0 5 10 15 20 25 30
50 1m 10m 100m LOAD CURRENT (A) 1 10
50 1m 10m 100m LOAD CURRENT (A) 1 10
0.01 INPUT VOLTAGE (V)
LOAD REGULATION vs. LOAD CURRENT
MAX1636 TOC07
VL LOAD-REGULATION ERROR vs. VL LOAD CURRENT
MAX1636 TOC08
REF LOAD-REGULATION ERROR vs. REF LOAD CURRENT
MAX1636 TOC09
5 4 LOAD REGULATION VOUT (mV) 3 2 1 0 -1 -2 -3 -4 -5 1m 10m 100m LOAD CURRENT (A) 1 PWM MODE VOUT = 5V
40 35 LOAD REGULATION V (mV) 30 25 20 15 10 5 0 0 5
0.6 0.5 0.4 0.3 0.2 0.1 0 0
10
10 15 20 25 30 35 40 45 50 VL LOAD CURRENT (mA)
LOAD REGULATION V (mV)
10 20 30 40 50 60 70 80 90 100 REF LOAD CURRENT (A)
DROPOUT VOLTAGE vs. LOAD CURRENT
MAX1636 TOC10
RESET TIME DELAY vs. OSC FREQUENCY
MAX1636 TOC11
LOAD-TRANSIENT RESPONSE (3.3V/3A, PWM MODE)
MAX1636 TOC12
400 350 300 VIN - VOUT (mV) 250 200 150 100 VOUT FORCED TO 4.95V 50 0 0.5 1.0 1.5 2.0 2.5 3.0
250 225 RESET TIME DELAY (ms) 200 175 150 125 100 75 50
VOUT 50mV/div
4A
LOAD 2A CURRENT 0A
3.5
150
200
250
300
350
400
450
500
LOAD CURRENT (A)
FOSC (kHz)
100s/div)
6
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power
_____________________________Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 7V, TA = +25C, unless otherwise noted.) LOAD-TRANSIENT RESPONSE (1.8V, PWM MODE)
MAX1636 TOC13
MAX1636
SWITCHING WAVEFORMS (PWM MODE)
MAX1636 TOC14
VOUT 50mV/div
VOUT 20mV/div
5V VLX 10A 5A LOAD CURRENT 0A 0V 1A 0A INDUCTOR CURRENT
100s/div
1s/div
SWITCHING WAVEFORMS (PFM MODE)
MAX1636 TOC15
SWITCHING WAVEFORMS (DROPOUT OPERATION)
VOUT = 5V VOUT 50mV/div
MAX1636 TOC16
VOUT = 1.8V
VOUT 20mV/div
5V VLX 0V 1A 0A INDUCTOR CURRENT
5V VLX 0 4A 2A 0A INDUCTOR CURRENT
20s/div
5s/div
STANDBY AND STARTUP RESPONSE (VOUT = 1.8V, NO LOAD)
MAX1636 TOC17
OVERVOLTAGE-PROTECTION WAVEFORMS (VIN SHORTED TO VOUT THROUGH a 0.5 RESISTOR)
MAX1636 TOC18
VOUT 1V/div
VOUT 100mV/div 5V VDL 0 0
VSHDN 5V/div
-5A -10A
INDUCTOR CURRENT
1ms/div
10s/div
_______________________________________________________________________________________
7
Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
______________________________________________________________Pin Description
PIN 1 2 3 4 5 6 7 8 9, 10 11 12 13 14 15 16 17 18 19 20 NAME CSH CSL RESET SHDN OVP CC REF SYNC GND FB VCC V+ VL DL PGND BST DH LX SKIP Current-Sense Input, High Side Current-Sense Input, Low Side. Also serves as a feedback input in fixed output modes. Timed Reset Output. Low for at least 100ms after output voltage is valid, then goes high impedance (open drain). Shutdown Control Input. Puts chip in shutdown or standby mode, depending on OVP (Table 5). Overvoltage Protection Enable/Disable. Tie to GND to disable OVP; tie to VCC to enable OVP. Compensation pin. Connect a small capacitor to GND to set the integration time constant. 1.100V Reference Output. Capable of sourcing 50A for external loads; bypass with a 0.22F (min) capacitor. Oscillator Frequency Select and Synchronization Input. Tie to VCC for 300kHz operation; tie to GND for 200kHz operation. Analog Ground Feedback Input. Tie to GND for fixed 3.3V output; tie to VCC for fixed 2.5V output; tie to resistor divider for adjustable mode. Main Supply Voltage Input. Powers the PWM controller, logic, and reference. Input range is +3.15V to +5.5V. 5V VL Linear-Regulator Input. The VL linear regulator automatically shuts off if V+ is left open or shorted to VL. Bypass V+ to GND with a 0.1F capacitor close to the IC. 5V Linear-Regulator Output. Powers the DL low-side gate driver. Bypass with a 2.2F (min) capacitor. Low-Side Gate-Driver Output Power Ground Boost-Capacitor Connection High-Side Gate-Driver Output Inductor Connection Low-Noise Mode Control. Forces fixed-frequency PWM operation when high. FUNCTION
______Standard Application Circuit
The basic MAX1636 buck converter (Figure 1) is easily adapted to meet a wide range of applications with inputs up to 30V by substituting components from Table 1. These circuits represent a good set of tradeoffs between cost, size, and efficiency, while staying within the worst-case specification limits for stressrelated parameters, such as capacitor ripple current. Do not change the circuits' switching frequency without
first recalculating component values (particularly inductance value at maximum battery voltage). Adding a Schottky rectifier across the synchronous rectifier improves circuit efficiency by approximately 1%. This rectifier is otherwise not needed because the MOSFET required typically incorporates a high-speed silicon diode from drain to source. Use a Schottky rectifier rated at a DC current equal to at least one-third of the load current.
8
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
Table 1. Component Selection for Standard Applications
COMPONENT Input Voltage Range Output Voltage Range Application Frequency LOAD CURRENT 1A 7V to 22V 1.8V CPU I/O 300kHz 4A 7V to 22V 1.8V CPU Core 300kHz 7A (EV KIT) 7V to 22V 1.25V to 2V CPU Core 300kHz 300kHz International Rectifier IRF7413, Fairchild NDS8410A, or Siliconix Si4410DY 300kHz International Rectifier IRF7413, Fairchild NDS8410A, or Siliconix Si4410DY 3A 4.75V to 30V 3.3V 3A 6V to 30V 5V
Q1 High-Side MOSFET
1/2 Si4902DY or 1/2 MMDF3NO3HD
International Rectifier International Rectifier IRF7413, IRF7403 or Fairchild NDS8410A, Siliconix Si9804DY or Siliconix Si4410DY
Q2 Low-Side MOSFET
1/2 Si4902DY or 1/2 MMDF3NO3HD
International Rectifier IRF7413, Fairchild FDS6680 or Fairchild NDS8410A, Siliconix Si4420DY or Siliconix Si4410DY
International Rectifier IRF7413, Fairchild NDS8410A, or Siliconix Si4410DY 2 x 22F, 35V AVX TPSE226M035R0300 or Sprague 593D226X0035E2W
International Rectifier IRF7413, Fairchild NDS8410A, or Siliconix Si4410DY 2 x 22F, 35V AVX TPSE226M035R0300 or Sprague 593D226X0035E2W
C1 Input Capacitor
4.7F, 25V ceramic Tokin C34Y5U1E475Z or Marcon/United Chemicon THCR40E1E475Z
2 x 10F, 25V ceramic Tokin C34Y5U1E106Z or Marcon/United Chemicon THCR50E1E106ZT
4 x 10F, 25V ceramic Tokin C34Y5U1E106Z or Marcon/United Chemicon THCR50E1E106ZT 4 x 390F, 6.3V lowESR, Sprague 594D397X06R3R2T, or 4 x 470F, 4V Sprague 594D477X0004R2T 0.010, 1% (2512) Dale WSL-2512-R010F 2.2H Panasonic P1F2R0HL, Sumida CDRH127-2R4, Coiltronics UP4-2R2, or Coilcraft DO5022P-222HC
C2 Output Capacitor
220F, 6.3V tantalum Sprague 595D227X96R3C2
2 x 470F, 4V low-ESR Sprague 594D477X0004R2T
2x 220F Sprague 594D 594D227X0010D2T
2x 220F Sprague 594D 594D227X0010D2T
R1 Resistor
0.070, 1% (1206) Dale WSL-1206-R070F
0.015, 1% (2512) Dale WSL-2512-R015F 4.6H Panasonic ETQP1F4R6H, Sumida CDRH127-4R7, Coiltronics UP2-4R7, or Coilcraft DO3316P-472
0.020, 1% (2010) Dale WSL-2010-R020F
0.020, 1% (2010) Dale WSL-2010-R020F
L1 Inductor
15H Sumida CD54-150
10H Sumida CDRH125-100, Coiltronics UP2-100, or Coilcraft DO3316-103
10H Sumida CDRH125-100, Coiltronics UP2-100, or Coilcraft DO3316-103
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
Table 2. Component Suppliers
POWER INPUT 0.1F
COMPANY AVX
FACTORY FAX (COUNTRY CODE) (1) 803-626-3123 (1) 516-435-1824 (1) 847-639-1469 (1) 561-241-9339 (1) 605-665-1627 (1) 408-721-1635 (1) 310-322-3332 (1) 512-992-3377 (1) 847-696-9278 (1) 512-992-3377 (1) 714-960-6492 (1) 602-994-6430 (1) 714-373-7183 (81) 7-2070-1174 (1) 408-970-3950 (1) 603-224-1430 (81) 3-3607-5144 (1) 847-390-4428 (1) 408-434-0375
USA PHONE (803) 946-0690 (516) 435-1110 (847) 639-6400 (561) 241-7876 (605) 668-4131 (408) 721-2181 (310) 322-3331 (512) 992-7900 (847) 696-2000 (512) 992-7900 (714) 969-2491 (602) 303-5454 (714) 373-7939 (619) 661-6835 (408) 988-8000 (603) 224-1961 (847) 956-0666 (847) 390-4373 (408) 432-8020
SHDN
V+
OVP SYNC VL VCC BST DH
4.7F C1 CMPSH-3 Q1 0.1F L1 R1 OUTPUT C2
Central Semiconductor Coilcraft Coiltronics Dale Fairchild International Rectifier (IR) IRC Marcon/United Chemi-Con IRC Matsuo Motorola
R2
1nF CC REF 1F GND GND LX DL PGND CSH VCC 10k RESET SKIP R3 *SEE RECTIFIER CLAMP DIODE SECTION FB CSL Q2 *
MAX1636
Panasonic Sanyo Siliconix Sprague Sumida TDK Tokin
Figure 1. Standard Application Circuit
_______________Detailed Description
The MAX1636 is a BiCMOS, switch-mode, power-supply controller designed primarily for buck-topology regulators in battery-powered applications where high efficiency and low quiescent supply current are critical. Light-load efficiency is enhanced by automatic Idle Mode operation, a variable-frequency, pulse-skipping mode that reduces transition and gate-charge losses. The step-down, power-switching circuit consists of two N-channel MOSFETs, a rectifier, and an LC output filter. The output voltage is the average AC voltage at the switching node, which is regulated by changing the duty cycle of the MOSFET switches. The gate-drive signal to the N-channel high-side MOSFET, which must exceed the battery voltage, is provided by a flyingcapacitor boost circuit that uses a 100nF capacitor between BST and LX. The MAX1636 contains 10 major circuit blocks (Figure 2).
Dual Mode is a trademark of Maxim Integrated Products.
10
The pulse-width-modulation (PWM) controller consists of a Dual ModeTM feedback network and multiplexer, a multi-input PWM comparator, high-side and low-side gate drivers, and logic. The MAX1636 contains faultprotection circuits that monitor the PWM output for undervoltage and overvoltage. Bias generator blocks include the 5V (VL) linear regulator and the 1.1V precision reference. The PWM uses a 200kHz/300kHz synchronizable oscillator. The circuit blocks are powered from an internal IC power rail that receives power from either VL or VCC. The synchronous-switch gate driver is powered directly from VL, while the high-side-switch gate driver is powered indirectly from VL via an external diode-capacitor boost circuit.
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
INPUT
V+
SYNC TO VL
MAX1636
IC POWER
SKIP
BST 200kHz TO 300kHz OSC DH PWM LOGIC LX VL DL PGND +
VCC
POWER SWITCHOVER 5V LINEAR REG. 1.1V REF.
VL
REF
SHDN
SHUTDOWN CONTROL + REF UNDERVOLTAGE FAULT OVERVOLTAGE FAULT VREF +7% VREF -5% TIMER + + 60kHz LP FILTER + VREF -30% SLOPE COMPENSATION + ERROR INTEGRATOR gm REF FB + 0.2V GND POWER GOOD OFF CSH CSL
CC
OVP
RESET
Figure 2. Functional Diagram
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11
Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
Table 3. SKIP PWM Table
SKIP LOAD CURRENT Light MODE DESCRIPTION Pulse-skipping, discontinuous inductor current Constant-frequency PWM, continuous inductor current Constant-frequency PWM, continuous inductor current Constant-frequency PWM, continuous inductor current
PWM Controller
The heart of the current-mode PWM controller is a multi-input, open-loop comparator that sums four signals: the output voltage error signal with respect to the reference voltage, the current-sense signal, the integrated voltage-feedback signal, and the slopecompensation ramp (Figure 3). The PWM controller is a direct-summing type, lacking a traditional error amplifier and the phase shift associated with it. This direct-summing configuration approaches ideal cycle-by-cycle control over the output voltage (Figure 4). When SKIP = low, Idle Mode circuitry automatically optimizes efficiency throughout the load-current range. Idle Mode dramatically improves light-load efficiency
Low
Idle
Low High High
Heavy Light Heavy
PWM PWM PWM
CSH 1X CSL FB 2X REF CC gm
R S Q LEVEL SHIFT OSC
BST DH LX
SLOPE COMPENSATION 30mV SKIP
DAC
CURRENT LIMIT CK
SHOOTTHROUGH CONTROL
SHDN
COUNTER SOFT-START
SYNCHRONOUS RECTIFIER CONTROL R -100mV S Q LEVEL SHIFT VL DL PGND
Figure 3. PWM Controller Functional Diagram
12 ______________________________________________________________________________________
Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
VCC R1 R2 TO PWM LOGIC UNCOMPENSATED HIGH-SPEED LEVEL TRANSLATOR AND BUFFER OUTPUT DRIVER I2 I3 I4 VBIAS
CC
FB
I1
REF CSH CSL SLOPE COMPENSATION
Figure 4. Main PWM Comparator Functional Diagram
by reducing the effective frequency, subsequently reducing switching losses. It forces the peak inductor current to ramp to 30% of the full current limit, delivering extra energy to the output and allowing subsequent cycles to be skipped. Idle Mode transitions seamlessly to fixed-frequency PWM operation as load current increases. With SKIP = high, the controller always operates in fixed-frequency PWM mode for lowest noise. Each pulse from the oscillator sets the main PWM latch that turns on the high-side switch for a period determined by the duty factor (approximately VOUT / VIN). As the high-side switch turns off, the synchronous rectifier latch sets; 60ns later, the low-side switch turns on. The low-side switch stays on until the beginning of the next clock cycle. In PWM mode, the controller operates as a fixed-frequency, current-mode controller in which the duty factor is set by the input/output voltage ratio. The current-mode feedback system regulates the peak inductor current value as a function of the output voltage error signal. In continuous-conduction mode, the average inductor current is nearly the same as the peak current, so the circuit acts as a switch-mode transconductance amplifier. This pushes the second output LC filter pole, normally found in a duty-factorcontrolled (voltage-mode) PWM, to a higher frequency.
To preserve inner-loop stability and eliminate regenerative inductor current "staircasing," a slope-compensation ramp is summed into the main PWM comparator to make the apparent duty factor less than 50%. The relative gains of the voltage-sense and currentsense inputs are weighted by the values of current sources that bias four differential input stages in the main PWM comparator (Figure 4). The voltage sense into the PWM has been conditioned by an integrated component of the feedback voltage, yielding excellent DC output voltage accuracy. See the Output Voltage Accuracy section for more information.
Synchronous Rectifier Driver (DL)
Synchronous rectification reduces conduction losses in the rectifier by shunting the normal Schottky catch diode with a low-resistance MOSFET switch. Also, the synchronous rectifier ensures proper start-up of the boost gate-driver circuit. If the synchronous power MOSFET is omitted for cost or other reasons, replace it with a small-signal MOSFET, such as a 2N7002. If the circuit is operating in continuous-conduction mode, the DL drive waveform is simply the complement of the DH high-side-drive waveform (with controlled dead time to prevent cross-conduction or "shoot-through"). In discontinuous (light-load) mode, the synchronous switch is turned off as the inductor current falls through zero.
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
Table 4. Powering the MAX1636
AVAILABLE POWER SOURCES Battery, 3.3V, and 5V Battery and 5V Battery and 3.3V Battery only VCC CONNECTS TO 3.3V 5V 3.3V VL V+ CONNECTS TO 5V 5V Battery Battery VL CONNECTS TO 5V 5V Bypass capacitor only Bypass capacitor only Least efficient COMMENT Most efficient
REF and VL Supplies and VCC Input The 1.1V reference (REF) is accurate to 1% over temperature, making REF useful as a precision system reference. Bypass REF to GND with a 0.22F (min) capacitor. REF can supply up to 50A for external loads. Loading REF reduces the main output voltage slightly because of the reference load-regulation error. The 5V VL linear-regulator output can be tied to the system +5V supply in order to obtain gate-drive power from an efficient source. The two supply pins (VCC and VL) are independent of each other (no protection diodes or sequencing requirements), allowing you to choose the most efficient sources for chip biasing from among existing system supply voltages without having to worry about sequencing or latch-up problems (Table 4). The V CC input runs the chip if the V CC voltage is greater than 3.15V. Otherwise, the chip supply is powered from VL via the internal VCC-VL switchover circuit. If a system supply between 3.3V and 5V is not available, tie VCC directly to VL. In shutdown mode, the VL regulator and reference are completely turned off. In standby mode, the VL regulator and DL stay alive so that the overvoltage-protection circuit can operate (Table 5). Important: Ensure that VL and VCC do not exceed 6V. Measure VL with the main output fully loaded. If it is pumped above 5.5V, either excessive boost-diode capacitance or excessive ripple at V+ is the probable cause. Use only small-signal diodes for the boost circuit (10mA to 100mA Schottky or 1N4148 are preferred) and bypass VL to PGND with a 4.7F capacitor directly at the package pins. Shutdown and Standby Modes
Holding SHDN low puts the IC into its 3A shutdown mode. SHDN is a logic input with a threshold of about 1V (the VTH of an internal N-channel MOSFET). For automatic start-up, tie SHDN to V+.
Standby operation is entered when SHDN = low and OVP = high (Table 5). In standby mode, the VL regulator stays active, and the DL output is forced high to provide overvoltage protection by clamping the output to GND. However, DL is not forced high until the output sags below VREF, so that the output can be held high by external keep-alive supplies.
RESET Power-Good Voltage Monitor
The power-good monitor generates a system-reset signal. The RESET output is an open drain that needs to be pulled up to the appropriate logic supply. At first power-up, RESET is held low until output is in regulation. At this point, an internal timer begins counting oscillator pulses, and RESET continues to be held low until 32,000 cycles have elapsed. After this timeout period (107ms at 300kHz or 160ms at 200kHz), the RESET output is released.
Output Undervoltage Lockout
The output undervoltage-lockout circuit is similar to foldback current limiting but employs a timer rather than a variable current limit. The SMPS has an undervoltage-protection circuit that is activated 6144 clock cycles after the SMPS is enabled. If the SMPS output is under 70% of the nominal value, output is latched off and does not restart until SHDN is toggled or until V+ power is cycled below 1V. Note that undervoltage protection can make prototype troubleshooting difficult, since only 20ms or 30ms elapse before the SMPS is latched off. The output undervoltage lockout circuit protects against heavy overloads and shorts to the main SMPS output. The circuit trips if the output is less than 70% of the nominal output value any time after the timeout has expired upon start-up. When the comparator trips, the output is turned off (the SMPS stops switching). This state is similar to thermal shutdown and can be exited by a power-on reset or by a rising edge on SHDN. The overvoltage crowbar is disabled in output undervoltage or thermal shutdown modes.
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
Table 5. Operating Modes
MODE Run SHDN High OVP High HOW ENTERED STATUS All circuit blocks active VL = on REF = off DL = high RESET = high-Z (high state) All circuit blocks inactive VL = on REF = off DL = high RESET = low VL = on REF = off DL = low RESET = low VL = on REF = off DL = high RESET = low All circuit blocks inactive NOTES Normal operation
Standby
Low
High
DL = high to enforce overvoltage protection
Shutdown
Low
Low
Lowest possible quiescent consumption
Overvoltage (crowbar)
High
High
VOUT > 7% too high
Cycling SHDN or a power-on reset exits crowbar.
Output UVLO
High
Don't care
VOUT < 70% of nominal after 20-30ms timeout expires
Cycling SHDN or a power-on reset exits output UVLO.
Thermal Shutdown
High
High
TJ > +150C
Cycling SHDN or a power-on reset exits thermal shutdown. Cycling SHDN or a power-on reset exits thermal shutdown.
Thermal Shutdown
High
Low
TJ > +150C
Output Overvoltage Protection (OVP)
The overvoltage crowbar protection circuit is intended to blow a fuse in series with the battery if the main SMPS output rises significantly higher than its preset level. In normal operation, the output is compared to the internal precision reference voltage. If the output goes 7% above nominal, the synchronous rectifier MOSFET turns on 100% (the high-side MOSFET is simultaneously forced off) in order to draw massive amounts of battery current to blow the fuse. This safety feature does not protect the system against a failure of the controller IC itself but is intended primarily to guard against a short across the high-side MOSFET. A crowbar event is latched and can only be reset by a rising edge on SHDN (or by removal of the V+ supply voltage). The overvoltage-detection decision is made relative to the regulation point. The overvoltage comparators are kept inactive in standby mode. Instead, the DL driver is simply left in the high state. However, DL does not turn on until the output has decayed to less than 1V. This prevents con-
flicts in systems where the output is held up by an external source in suspend or backup mode. The OVP pin has an internal pulldown resistor that is only turned on during the reset phase. The OVP pin's state is then sampled and stored internally. A floating OVP pin implies no overvoltage protection.
Boost High-Side Gate-Drive Supply (BST)
Gate-drive voltage for the high-side N-channel switch is generated by a flying-capacitor boost circuit (Figure 2). The capacitor between BST and LX is alternately charged from the VL supply and placed parallel to the high-side MOSFET's gate-source terminals. On start-up, the synchronous rectifier (low-side MOSFET) forces LX to 0V and charges the boost capacitor to 5V. On the second half-cycle, the SMPS turns on the high-side MOSFET by closing an internal switch between BST and DH. This provides the necessary enhancement voltage to turn on the high-side switch, an action that boosts the 5V gate-drive signal above the battery voltage.
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
Ringing at the high-side MOSFET gate (DH) in discontinuous-conduction mode (light loads) is a natural operating condition. It is caused by residual energy in the tank circuit, formed by the inductor and stray capacitance at the switching node, LX. The gate-drive negative rail is referred to LX, so any ringing there is directly coupled to the gate-drive output. PWM comparator, with the gain weighted so that the integrated signal has only enough gain to correct the DC inaccuracies. The integrator's response time is determined by the time constant set by the capacitor placed on the CC pin. The time constant should not be so fast that the integrator responds to the normal VOUT ripple or too slow to negate the integrator's effect. A 470pF to 1500pF CC capacitor is sufficient for 200kHz to 300kHz frequencies. Figure 5 shows the output voltage response to a 0A to 3A load transient with and without the integrator. With the integrator, the output voltage returns to within 0.1% of its no-load value with only a small AC excursion. Without the integrator, the typical load-transient response with the AC and DC output voltage changes. Asymmetrical clamping at the integrator output prevents worsening of load transients during pulseskipping mode.
Current-Limiting and Current-Sense Inputs (CSH and CSL)
The current-limit circuit resets the main PWM latch and turns off the high-side MOSFET switch whenever the voltage difference between CSH and CSL exceeds 100mV. This limiting is effective for both current flow directions, putting the threshold limit at 100mV. The tolerance on the positive current limit is 20%, so the external low-value sense resistor (R1) must be sized for 80mV/IPEAK, where IPEAK is the required peak inductor current to support the full load current. Components must be designed to withstand continuous current stresses of 120mV/R1. For breadboarding or for very high current applications, it may be useful to wire the current-sense inputs with a twisted pair rather than PC traces (two pieces of wrapped wire twisted together are sufficient.) This reduces the noise picked up at CSH and CSL, which can cause unstable switching and reduced output current.
Internal Digital Soft-Start Circuit
Soft-start allows a gradual increase of the internal current-limit level at start-up to reduce input surge currents. The SMPS contains an internal digital soft-start circuit controlled by a counter, a digital-to-analog converter (DAC), and a current-limit comparator. In shutdown or standby mode, the soft-start counter is reset to zero. When the SMPS is enabled, its counter starts counting oscillator pulses, and the DAC begins incrementing the comparison voltage applied to the currentlimit comparator. The DAC output increases from 0mV to 100mV in five equal steps as the count increases to 512 clocks. As a result, the main output capacitor charges up relatively slowly. The exact time of the output rise depends on output capacitance and load current, but it is typically 1ms with a 300kHz oscillator.
Oscillator Frequency and Synchronization (SYNC)
The SYNC input controls the oscillator frequency. Low selects 200kHz; high selects 300kHz. SYNC can also be used to synchronize with an external 5V CMOS or TTL clock generator. SYNC has a guaranteed 240kHz to 340kHz capture range. A high-to-low transition on SYNC initiates a new cycle. Operation at 300kHz optimizes the application circuit for component size and cost. Operation at 200kHz provides increased efficiency, lower dropout, and improved load-transient response at low input-output voltage differences (see the Low-Voltage Operation section).
Overload and Dropout Operation
Dropout (low input-output differential) operation is enhanced by stretching the clock pulse width to increase the maximum duty factor. The algorithm follows: If the output voltage (VOUT) drops out of regulation without the current limit having been reached, the SMPS skips an off-time period (extending the on-time). At the end of the cycle, if the output is still out of regulation, the SMPS skips another off-time period. This action can continue until three off-time periods are skipped, effectively dividing the clock frequency by as much as four. This behavior also slightly improves loadtransient response. Dividing the clock frequency by four raises the maximum duty factor to above 98%. The typical PWM minimum off-time is 300ns, regardless of the operating frequency.
Output Voltage Accuracy (GND, CC)
Output voltage error is guaranteed to be within 1% over all conditions of line, load, and temperature. The DC load regulation is typically better than 0.1% due to the integrator amplifier. Transient response is optimized by providing a feedback signal that has a direct path from the output to the main summing PWM comparator. The integrated feedback signal is also summed into the
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
INTEGRATOR ACTIVE VOUT (mV) -50 4 IOUT (A) 2 0 IOUT (A) -50 4 2 0 CC = REF VOUT = 3.3V INTEGRATOR DEFEATED
50 VOUT (mV)
CC = 470pF VOUT = 3.3V
50
(100s/div)
(100s/div)
Figure 5a. Load-Transient Response with Integrator Active
Figure 5b. Load-Transient Response with Integrator Defeated
Adjustable-Output Feedback (Dual-Mode FB)
A fixed, preset output voltage of 2.5V and 3.3V is selected when FB is connected to VCC or ground. In this mode, internal resistors monitor the voltage on CSL. For voltages other than the fixed-output options, adjust the output voltage through a resistor divider connected to FB (Figure 2). Calculate the output voltage with the following formula: VOUT = VREF (1 + R1 / R2) where VREF = 1.1V nominal. Recommended normal values for R2 range from 5k to 100k. To achieve a 1.1V nominal output, simply connect FB directly to CSL. Remote output voltage sensing is not possible in fixed output mode due to the combined nature of the voltage-sense and current-sense inputs (CSL). It is, however, easy to do in adjustable mode by using the top of the external resistor divider as the remote sense point.
Low-Noise Operation (PWM Mode)
PWM mode (SKIP = high) minimizes RF and audio interference in noise-sensitive applications such as hi-fi multimedia-equipped systems, cellular phones, RF communicating computers, and electromagnetic penentry systems. See the summary of operating modes in Table 5. SKIP can be driven from an external logic signal.
PWM mode forces a constant switching frequency, reducing interference due to switching noise by concentrating the emissions at a known frequency outside the system audio or IF bands. Choose an oscillator frequency for which switching frequency harmonics do not overlap a sensitive frequency band. If necessary, synchronize the oscillator to a tight-tolerance external clock generator. To extend the output voltage-regulation range, constant operating frequency is not maintained under overload or dropout conditions (see the Overload and Dropout Operation section). PWM mode (SKIP = high) forces two changes on the PWM controller. First, it disables the minimum-current comparator, ensuring fixed-frequency operation. Second, it changes the detection threshold for reversecurrent limit from 0mV to -100mV, allowing the inductor current to reverse at light loads. This results in fixed-frequency operation and continuous inductor-current flow. PWM mode eliminates discontinuous-mode inductor ringing and improves cross-regulation of transformercoupled, multiple-output supplies. In most applications, tie SKIP to GND to minimize quiescent supply current. VL supply current with SKIP high is typically 20mA, depending on external MOSFET gate capacitance and switching losses.
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
__________________Design Procedure
The five predesigned standard application circuits (Figure 1 and Table 1) contain ready-to-use solutions for common application needs. Use the following design procedure to optimize these basic schematics for different voltage or current requirements. But before beginning a design, firmly establish the following: * Maximum input (battery) voltage, V IN(MAX) . This value should include the worst-case conditions, such as no-load operation when a battery charger or AC adapter is connected but no battery is installed. VIN(MAX) must not exceed 30V. * Minimum input (battery) voltage, VIN(MIN). This should be taken at full load under the lowest battery conditions. If VIN(MIN) is less than 4.5V, use an external circuit to externally hold VL above the VL undervoltage lockout threshold. If the minimum input-output difference is less than 1.5V, the filter capacitance required to maintain good AC load regulation increases (see Low-Voltage Operation section). L = VOUT(VIN(MAX) - VOUT) / (VIN(MIN) x f x IOUT x LIR) where f = switching frequency, normally 200kHz or 300kHz, and IOUT = maximum DC load current. The peak current can be calculated by:
IPEAK = ILOAD + [VOUT(VIN(MAX) - VOUT) / (2 x f x L x VIN(MAX))]
The inductor's DC resistance should be low enough that RDC x IPEAK < 100mV, as it is a key parameter for efficiency performance. If a standard, off-the-shelf inductor is not available, choose a core with an LI2 rating greater than L x IPEAK2 and wind it with the largest diameter wire that fits the winding area. For 300kHz applications, ferrite-core material is strongly preferred; for 200kHz applications, Kool-Mu(R) (aluminum alloy) or even powdered iron is acceptable. If light-load efficiency is unimportant (in desktop PC applications, for example), then low-permeability iron-powder cores may be acceptable, even at 300kHz. For high-current applications, shielded-core geometries, such as toroidal or pot core, help keep noise, EMI, and switching-waveform jitter low.
Inductor Value
The exact inductor value is not critical and can be freely adjusted to make trade-offs between size, cost, and efficiency. Lower inductor values minimize size and cost but reduce efficiency due to higher peak-current levels. The smallest inductor is achieved by lowering the inductance until the circuit operates at the border between continuous and discontinuous mode. Further reducing the inductor value below this crossover point results in discontinuous-conduction operation even at full load. This helps lower output filter capacitance requirements, but efficiency suffers due to high I2R losses. On the other hand, higher inductor values mean greater efficiency, but resistive losses due to extra wire turns eventually exceed the benefit gained from lower peak-current levels. Also, high inductor values can affect load-transient response (see the VSAG equation in the Low-Voltage Operation section). The equations in this section are for continuous-conduction operation. Three key inductor parameters must be specified: inductance value (L), peak current (IPEAK), and DC resistance (RDC). The following equation includes a constant, LIR, which is the ratio of inductor peak-topeak AC current to DC load current. A higher LIR value allows smaller inductance but results in higher losses and higher ripple. A good compromise between size and losses is a 30% ripple-current to load-current ratio (LIR = 0.3), which corresponds to a peak inductor current 1.15 times higher than the DC load current.
Kool-Mu is a registered trademark of Magnetics, Inc.
18
Current-Sense Resistor Value
The current-sense resistor value is calculated according to the worst-case, low-current-limit threshold voltage (from the Electrical Characteristics table) and the peak inductor current: RSENSE = 80mV / IPEAK Use IPEAK from the second equation in the Inductor Value section. Use the calculated value of RSENSE to size the MOSFET switches and specify inductor saturation-current ratings according to the worst-case highcurrent-limit threshold voltage: IPEAK = 120mV / RSENSE Low-inductance resistors, such as surface-mount metal film, are recommended.
Input Capacitor Value
Connect low-ESR bulk capacitors directly to the drain on the high-side MOSFET. The bulk input filter capacitor is usually selected according to input ripple current requirements and voltage rating, rather than capacitor value. Electrolytic capacitors with low enough equivalent series resistance (ESR) to meet the ripple-current requirement invariably have sufficient capacitance values. Aluminum electrolytic capacitors, such as Sanyo OS-CON or Nichicon PL, are superior to tantalum types, which risk power-up surge-current failure, especially when connecting to robust AC adapters or lowimpedance batteries. RMS input ripple current (IRMS) is
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power
determined by the input voltage and load current, with the worst case occurring at VIN = 2 x VOUT: IRMS = ILOAD x VOUT VIN - VOUT / VIN
(
)
Therefore, when VIN is 2 x VOUT: IRMS = ILOAD / 2
Designers of RF communicators or other noise-sensitive analog equipment should be conservative and stay within the guidelines. Designers of notebook computers and similar commercial-temperature-range digital systems can multiply the RESR value by a factor of 1.5 without hurting stability or transient response. The output voltage ripple, which is usually dominated by the filter capacitor's ESR, can be approximated as IRIPPLE x RESR. There is also a capacitive term, so the full equation for ripple in continuous-conduction mode is V NOISE(p-p) = I RIPPLE x [R ESR + 1 / (2 x p x f x COUT)]. In Idle Mode, the inductor current becomes discontinuous, with high peaks and widely spaced pulses, so the noise can actually be higher at light load (compared to full load). In Idle Mode, calculate the output ripple as follows: VNOISE(p-p) = 0.02 x RESR + RSENSE
MAX1636
Output Filter Capacitor Value
The output filter capacitor values are generally determined by the ESR and voltage-rating requirements rather than actual capacitance requirements for loop stability. In other words, the low-ESR electrolytic capacitor that meets the ESR requirement usually has more output capacitance than is required for AC stability. Use only specialized low-ESR capacitors intended for switching-regulator applications, such as AVX TPS, Sprague 595D, Sanyo OS-CON, or Nichicon PL series. To ensure stability, the capacitor must meet both minimum capacitance and maximum ESR values as given in the following equations: COUT > VREF(1 + VOUT / VIN(MIN)) / VOUT x RSENSE x f RESR < RSENSE x VOUT / VREF where RESR can be multiplied by 1.5, as discussed below. These equations are worst case, with 45 degrees of phase margin to ensure jitter-free, fixed-frequency operation, and provide a nicely damped output response for zero to full-load step changes. Some costconscious designers may wish to bend these rules with less-expensive capacitors, particularly if the load lacks large step changes. This practice is tolerable if some bench testing over temperature is done to verify acceptable noise and transient response. No well-defined boundary exists between stable and unstable operation. As phase margin is reduced, the first symptom is timing jitter, which shows up as blurred edges in the switching waveforms where the scope does not quite sync up. Technically speaking, this jitter (usually harmless) is unstable operation, since the duty factor varies slightly. As capacitors with higher ESRs are used, the jitter becomes more pronounced, and the load-transient output voltage waveform starts looking ragged at the edges. Eventually, the load-transient waveform has enough ringing on it that the peak noise levels exceed the allowable output voltage tolerance. Note that even with zero phase margin and gross instability, the output voltage noise never gets much worse than IPEAK x RESR (under constant loads).
0.0003 x L x 1/VOUT + 1/ VIN - VOUT
(RSENSE )
[
(
)]
2
x CF
Selecting Other Components
MOSFET Switches The high-current N-channel MOSFETs must be logiclevel types with guaranteed on-resistance specifications at VGS = 4.5V. Lower gate-threshold specifications are better (i.e., 2V max rather than 3V max). Drain-source breakdown voltage ratings must at least equal the maximum input voltage, preferably with a 20% derating factor. The best MOSFETs have the lowest on-resistance per nanocoulomb of gate charge. Multiplying RDS(ON) by Qg provides a good figure of merit for comparing various MOSFETs. Newer MOSFET process technologies with dense cell structures generally perform best. The internal gate drivers tolerate >100nC total gate charge, but 70nC is a more practical upper limit to maintain best switching times. In high-current applications, MOSFET package power dissipation often becomes a dominant design factor. I2R power losses are the greatest heat contributor for both high-side and low-side MOSFETs. I2R losses are distributed between Q1 and Q2 according to duty factor as shown in the equations below. Generally, switching losses affect only the upper MOSFET, since the Schottky rectifier usually clamps the switching node before the synchronous rectifier turns on. Gate-charge losses are dissipated by the driver and do not heat the MOSFET. Calculate the temperature rise according to package thermal-resistance specifications to ensure
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
that both MOSFETs are within their maximum junction temperature at high ambient temperature. The worstcase dissipation for the high-side MOSFET occurs at both extremes of input voltage, and the worst-case dissipation for the low-side MOSFET occurs at maximum input voltage. Duty = (VOUT + VQ2) / (VIN - VQ1) PD (upper FET) = ILOAD2 x RDS(ON) x Duty + VIN x ILOAD x f x [(VIN x CRSS) / IGATE + 20ns] PD (lower FET) = ILOAD2 x RDS(ON) x (1 - Duty) where on-state voltage drop V Q = ILOAD x RDS(ON), CRSS = MOSFET reverse transfer capacitance, IGATE = DH driver peak output current capability (1A typ), and 20ns = DH driver inherent rise/fall time. The MAX1636's output undervoltage shutdown protects the synchronous rectifier under output short-circuit conditions. To reduce EMI, add a 0.1F ceramic capacitor from the high-side switch drain to the low-side switch source.
Low-Voltage Operation
Low input voltages and low input-output differential voltages each require extra care in their design. Low absolute input voltages can cause the VL linear regulator to enter dropout and eventually shut itself off. Low VIN - VOUT differentials can cause the output voltage to sag when the load current changes abruptly. The sag's amplitude is a function of inductor value and maximum duty factor (D MAX , an Electrical Characteristics parameter, 98% guaranteed over temperature at f = 200kHz) as follows: VSAG = (ISTEP )2 x L 2 x CF x (VIN(MIN) x DMAX - VOUT )
Rectifier Clamp Diode The rectifier is a clamp across the low-side MOSFET that catches the negative inductor swing during the 60ns dead time between turning one MOSFET off and each low-side MOSFET on. The latest generations of MOSFETs incorporate a high-speed silicon body diode, which serves as an adequate clamp diode if efficiency is not of primary importance. A Schottky diode can be placed in parallel with the body diode to reduce the forward voltage drop, typically improving efficiency 1% to 2%. Use a diode with a DC current rating equal to one-third of the load current; for example, use an MBR0530 (500mA-rated) type for loads up to 1.5A, a 1N5819 type for loads up to 3A, or a 1N5822 type for loads up to 10A. The rectifier's rated reversebreakdown voltage must be at least equal to the maximum input voltage, preferably with a 20% derating factor. Boost-Supply Diode A signal diode such as a 1N4148 works well in most applications. If the input voltage can go below +6V, use a small (20mA) Schottky diode for slightly improved efficiency and dropout characteristics. Do not use large power diodes, such as 1N5817 or 1N4001, since high junction capacitance can pump up VL to excessive voltages.
Table 6 is a low-voltage troubleshooting guide. The cure for low-voltage sag is to increase the output capacitor's value. For example, at VIN = +5.5V, VOUT = 5V, L = 10H, f = 200kHz, and ISTEP = 3A, a total capacitance of 660F keeps the sag less than 200mV. Note that only the capacitance requirement increases; the ESR requirements do not change. Therefore, the added capacitance can be supplied by a low-cost bulk capacitor in parallel with the normal low-ESR capacitor.
__________Applications Information
Heavy-Load Efficiency Considerations
The major efficiency-loss mechanisms under loads are as follows, in the usual order of importance: * P(I2R) = I2R losses * P(tran) = transition losses * P(gate) = gate-charge losses * P(diode) = diode-conduction losses * P(cap) = capacitor ESR losses * P(IC) = losses due to the IC's operating supply current Inductor core losses are fairly low at heavy loads because the inductor's AC current component is small. Therefore, they are not accounted for in this analysis. Ferrite cores are preferred, especially at 300kHz, but powdered cores, such as Kool-Mu, can also work well. Efficiency = POUT / PIN x 100% = POUT / (POUT + PTOTAL) x 100% PTOTAL = P(I2R) + P(tran) + P(gate) + P(diode) + P(cap) + P(IC) P = (I2R) = (ILOAD)2 x (RDC + RDS(ON) +RSENSE)
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
Table 6. Low-Voltage Troubleshooting Chart
SYMPTOM Sag or droop in VOUT under step-load change Dropout voltage is too high (VOUT follows VIN as VIN decreases) Unstable--jitters between different duty factors and frequencies Poor efficiency Won't start under load or quits before battery is completely dead CONDITION Low VIN-VOUT differential, <1.5V ROOT CAUSE Limited inductor-current slew rate per cycle. SOLUTION Increase bulk output capacitance per formula (see Low-Voltage Operation section). Reduce inductor value. Reduce operation to 200kHz. Reduce MOSFET on-resistance and coil DCR. Increase the minimum input voltage or ignore. Use a small 20mA Schottky diode for boost diode. Supply VL from an external source. Supply VL from an external source other than VIN, such as the system +5V supply.
Low VIN-VOUT differential, <1V Low VIN-VOUT differential, <0.5V
Maximum duty-cycle limits exceeded. Normal function of internal low-dropout circuitry. VL linear regulator is going into dropout and isn't providing good gate-drive levels. VL output is so low that it hits the VL UVLO threshold.
Low input voltage, <5V
Low input voltage, <4.5V
where RDC is the DC resistance of the coil, RDS(ON) is the MOSFET on-resistance, and RSENSE is the currentsense resistor value. The RDS(ON) term assumes identical MOSFETs for the high-side and low-side switches because they time-share the inductor current. If the MOSFETs are not identical, their losses can be estimated by averaging the losses according to duty factor. PD(tran) = transition loss = VIN x ILOAD x f x 3/2 x [(VIN CRSS / IGATE ) + 20ns] where CRSS is the reverse transfer capacitance of the high-side MOSFET (a data-sheet parameter), IGATE is the DH gate-driver peak output current (1.5A typ), and 20ns is the rise/fall time of the DH driver (20ns typ). P(gate) = Qg x f x VL where VL is the internal logic-supply voltage (+5V), and Qg is the sum of the gate-charge values for low-side and high-side switches. For matched MOSFETs, Qg is twice the data-sheet value of an individual MOSFET. If VOUT is set to less than 4.5V, replace VL in this equation with V BATT . In this case, efficiency can be improved by connecting VL to an efficient 5V source, such as the system +5V supply. P(diode) = diode conduction losses = ILOAD x VFWD x tD x f where tD is the diode-conduction time (120ns typ), and VFWD is the forward voltage of the diode. This power is
dissipated in the MOSFET body diode if no external Schottky diode is used. P(cap) = input capacitor ESR loss = IRMS2 x RESR where IRMS is the input ripple current as calculated in the Input Capacitor Value section.
Light-Load Efficiency Considerations
Under light loads, the PWM operates in discontinuous mode, where the inductor current discharges to zero at some point during the switching cycle. This makes the inductor current's AC component high compared to the load current, which increases core losses and I2R losses in the output filter capacitors. For best light-load efficiency, use MOSFETs with moderate gate-charge levels and use ferrite, MPP, or other low-loss core material. Avoid powdered-iron cores; even Kool-Mu (aluminum alloy) is not as good as ferrite.
PC Board Layout Considerations
Good PC board layout is required in order to achieve specified noise, efficiency, and stable performance. The PC board layout artist must be given explicit instructions, preferably a pencil sketch showing the placement of power-switching components and highcurrent routing. See the PC board layout in the MAX1636 evaluation kit manual for examples. A ground plane is essential for optimum performance. In most applications, the circuit will be located on a multi-layer board, and full use of the four or more copper layers is recommended. Use the top layer for high-current
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
HIGH-CURRENT PATH VCC
SENSE RESISTOR
MAX1636
VL
GND BST LX
MAX1636
Figure 6. Kelvin Connections for the Current-Sense Resistors
Figure 7. Capacitor Placement
connections, the bottom layer for quiet connections (REF, CC, GND), and the inner layers for an uninterrupted ground plane. Use the following step-by-step guide: 1) Place the high-power components (C1, C2, Q1, Q2, D1, L1, and R1) first, with their grounds adjacent. * Minimize current-sense resistor trace lengths and ensure accurate current sensing with Kelvin connections (Figure 6). * Minimize ground trace lengths in the high-current paths. * Minimize other trace lengths in the high-current paths. -- Use >5mm-wide traces. -- CIN to high-side MOSFET drain: 10mm max length -- Rectifier diode cathode to low side -- MOSFET: 5mm max length -- LX node (MOSFETs, rectifier cathode, inductor): 15mm max length Ideally, surface-mount power components are butted up to one another with their ground terminals almost touching. These high-current grounds are then connected to each other with a wide, filled zone of top-layer copper so they do not go through vias. The resulting top-layer subground plane is connected to the normal inner-layer ground plane at the output ground
terminals, which ensures that the IC's analog ground is sensing at the supply's output terminals without interference from IR drops and ground noise. Other high-current paths should also be minimized, but focusing primarily on short ground and current-sense connections eliminates about 90% of all PC board layout problems (see the PC board layouts in the MAX1636 evaluation kit manual for examples). 2) Place the IC and signal components. Keep the main switching nodes (LX nodes) away from sensitive analog components (current-sense traces and REF capacitor). Place the IC and analog components on the opposite side of the board from the powerswitching node. Important: The IC must be no further than 10mm from the current-sense resistors. Keep the gate-drive traces (DH, DL, and BST) shorter than 20mm and route them away from CSH, CSL, and REF. Place ceramic bypass capacitors close to the IC. The bulk capacitors can be placed further away. If using VL to power VCC, minimize noise by placing a 0.1F capacitor close to the VCC pin and placing the 4.7F capacitor further away, but closer than the boost diode (Figure 7). 3) Use a single-point star ground where the input ground trace, power ground (subground plane), and normal ground plane meet at the supply's output ground terminal. Connect both IC ground pins and all IC bypass capacitors to the normal ground plane.
___________________Chip Information
TRANSISTOR COUNT: 3472
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power
________________________________________________________Package Information
MAX1636
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SSOP.EPS
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Low-Voltage, Precision Step-Down Controller for Portable CPU Power MAX1636
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